What does ZDB stand for?

Zero Delay Buffer

This definition appears very rarely and is found in the following Acronym Finder categories:

Information technology (IT) and computers

Other Resources:

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Zimbabwe Diabetic Association Zinc Development Association Zu Den Akten (German: To The Documents) Zeus Distributed Authentication and Content Zertifikat Deutsch Als Fremdsprache Zero Defect Application Kernel Zafara Double Agent Plushie (neopets) Zentralausschuss Der Agrargewerblichen Wirtschaft (German agrarian-commercial economy central committee) Zimbabwe Domestic and Allied Workers Union (est. 1980) Zeitschriftendatenbank (States Library Berlin; specialized database for international serial titles)		Zimbabwe Development Bank Zwingen Dittingen Blauen Nenzlingen (German parish) Ziff-Davis Benchmark Operation Washington, DC (Air Route Traffic Control Center) Zero Defect Council Zero-Degree Calorimeter Zeus Defense Center Zinc Die Casting Zohry Demographic Consulting Zero Defects by Design

Samples in periodicals archive:

a communications IC company, has introduced the industry's first family of zero delay buffers capable of user-selectable 2.

IDT UNVEILS LINE OF ZERO DELAY BUFFERS WITH 10 OUTPUTS

The zero delay buffer portfolio includes devices with up to 12 outputs and these parts are available in commercial and industrial temperature ranges.

IDT Extends Timing Leadership With Introduction of New Series of PCI ...

First Quarter Highlights --Increased Analog and Mixed Signal revenue by 49 percent sequentially, driven by increased demand in the high growth LCD display market --Released 15 new Analog and Mixed Signal products in General Purpose EMI reduction (3), High Performance Clocks (2) and System Monitors (10) --Sampled high-end Low Voltage Zero Delay Buffers and Fan Out Buffers --Introduced EMI compliant Pulse Width Modulator (PWM) Controller The Company reported revenues of $5.

Alliance Semiconductor Reports Financial Results for the First Fiscal ...

A Comprehensive Improvement Over Traditional Clock Network Design Clock networks are traditionally designed using simple components such as fan-out buffers, clock generators, delay lines, zero delay buffers and frequency synthesizers.

Lattice Introduces ispClock High-Performance Clock Generator Devices

The CY2SSTV857-32 also features differential feedback clock outputs and inputs, enabling it to serve as a zero delay buffer (ZDB).

Cypress Samples High-Performance PLL Clock Driver For Advanced DDR400 ...

The CY23020-3 is a 400-MHz PLL-based zero delay buffer with differential outputs and an aggressive jitter specification of 15 ps RMS, which makes it suitable for a variety of communication applications that require low noise.

Cypress Announces Industry's Lowest Total Timing Budget Zero Delay ...

BUSINESS WIRE)--April 21, 2003 High-Performance Clock Distribution Device Optimized for High-End Networking and Data Communications Systems with Multiple Clock Frequencies Cypress Semiconductor Corporation (NYSE:CY), the world leader in timing technology solutions, today announced volume production of its field programmable zero delay buffer (CY23FP12).

Cypress Announces Field Programmable Zero Delay Buffer

The devices provide the industry's broadest range of translation capabilities between I/O standards with five user-configurable single-ended or differential signal variants at the input and four signal variants at the output, as well as pin-to-pin compatibility for ease of migration between the zero delay buffer and programmable skew devices.

IDT Strengthens Clock Management Portfolio with Its New Family of ...