Many designs incorporate embedded metal through-silicon vias (TSVs), which form the interconnection between chip layers once the processed wafers are thinned to expose them, and then they are bonded to form the 3-D stack.
leading provider of technology for the deposition of nanometric films used in both semiconductor interconnects and 3D through-silicon vias (TSV), has demonstrated that TSVs with aspect ratios of 20:1 can save chipmakers more than $700 per 300-mm wafer compared to TSVs with ratios of 5:1, by reducing the die area needed for interconnection.
These state-of-the-art systems will be used for fabricating through-silicon vias (TSVs), a key technique for making compact, energy-efficient, high performance CMOS image sensors, and stacked memory and memory/logic chips for mobile communications devices.
One of unique features of BeSangs 3D IC is the capability of unrestricted 3D interconnections using conventional via technologies that does not require wafer alignment nor through-silicon vias for 3D interconnects," said Dr.
Emerging technologies that will be combined with this base include wafer-level packaging, die stacking, package stacking, through-silicon vias (TSV), 3-D packaging, printable circuits, thinned wafers, and embedded actives and passives.
