What does SIMD stand for?

Single Instruction Multiple Data

This definition appears very rarely and is found in the following Acronym Finder categories:

Information technology (IT) and computers

Other Resources:

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Simulation to C4I Interoperability Simulation for Critical Infrastructure Protection (Integrated Risk Reduction of Information-Based Infrastructure Systems; EU) Sahara India Media Communications Ltd Stock Inventory Management and Customer Ordering Simulation Converter slurry infiltrated mat concrete Scientific Information Management Coordination Board (US EPA) Surgical Intermediate Care Unit SACDIN Implementation & Cutover Plan Scottish Index of Multiple Deprivation (Office of the Chief Statistician; Edinburgh, Scotland, UK)		Single Instruction-Stream, Multiple Data-Stream Society of Inherited Metabolic Disorders Substance Induced Mood Disorder Surfaces and Interfaces of Mesoscopic Devices (conference) Simulations-Based Division Army Trainer Simulation Development Sistem Informasi Managemen Di Indonesia (Indonesian: Information Systems Management In Indonesia) SIMulation DISposition Systeme d'Information sur les Matieres Dangereuses Utilisees au Travail (Workplace Hazardous Materials Information System) Secure Information Management Environment (US Navy)

Samples in periodicals archive:

The AltiVec engine runs concurrently with the PowerPC's floating point and integer units, using SIMD single instruction multiple data parallel processing, enabling it to execute up to 20 operations per cycle, according to Motorola.

Apple Launches New G4s, Using Motorola's AltiVec PowerPC

The architecture exploits multiple levels of parallelism: * task-level parallelism between the system processor, DSP processor and DPU * data-level parallelism (DLP) with multiple lanes executing the same instructions on different data in parallel * instruction-level parallelism (ILP) via very long instruction word (VLIW) driving multiple arithmetic logic units (ALUs) per lane * sub-word single instruction multiple data (SIMD) in which each ALU can operate on multiple operands On the DPU, a kernel function runs identically on every lane processing different data.

Stream Processors, Inc. Announces Breakthrough Digital Signal ...

Using a Pentium II core, but including the 70 new instructions - the "Katmai" graphics streaming single instruction multiple data set - the first chips are expected to appear in March.

INTEL TO NAME KATMAI CHIPS AS PENTIUM III

About the Configurable ARC(TM) Video Subsystem The ARC Video Subsystem includes an ARC 700 family core that is coupled with the company's award winning single instruction multiple data (SIMD) accelerator, which was specifically designed for video and audio processing.

Skymedi Adopts the ARC(TM) Video Subsystem to Create Integrated ...

VXIS Adopts Configurable ARC(TM) Video Subsystem For Portable Digital ...

It includes a configurable ARC 700 family processor, ARC's award winning 128-bit Single Instruction Multiple Data (SIMD) accelerator, a media-centric DMA engine and hardware and software development tools.

Oki Electric Adopts ARC(TM) Sound Advanced Subsystem for Advanced Car ...

About P4K The P4K chip is a massively parallel supercomputer organized in a two dimensional Single Instruction Multiple Data (SIMD) architecture with 4096 RISC-type computers on a single chip operating in unison.

Teranex Delivers TeraOps of Performance; Next-Generation Image ...

The CW4512 ViSP is built on a 32-bit fixed-point system-on-a-chip (SoC) that includes eight parallel single instruction multiple data (SIMD) DSPs integrated with a fast RISC serial processor.

ChipWrights Announces CW4512 Visual Signal Processor; Enables ...