What does SR stand for?

Shift Register

This definition appears very rarely and is found in the following Acronym Finder categories:

Information technology (IT) and computers

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Samples in periodicals archive:

The shift update scheme forms a shift register for each state by collecting the flip-flops in the horizontal direction as shown in Figure 5(a).

A low power and high speed ddecoder based on deep pipelined, clock ...

The high voltage outputs are controlled by data clocked into an internal 8-bit shift register and stored in an 8-bit transparent latch.

United States: Clare Announces New Eight-Channel High Voltage Analog ...

Some specific areas described are bridge defect diagnosis for multiple-voltage design, bypassing blocking bugs during post-silicon validation, accelerated shift registers for x-tolerant test data compaction, and jitter decomposition in high-speed communication systems.

European test symposium; proceedings

Other features include low charge injections to obtain clearer images and a faster frame rate, 22-ohm switch resistance that minimizes the return signal attenuation and a CMOS serial shift register that minimizes I/O connections and power dissipation.

SUPERTEX BROADENS HIGH VOLTAGE ANALOG SWITCH CHIP-SCALE

Products are tracked throughout the system using a shift register, with optional print and code monitoring controls available to guarantee total product security at all times.

New Herma 040M better all round

It has a 4 x 12 character backlit LCD screen, shift registers and cursor keys that can be configured as inputs.

Micro PLC-relay

The Xilinx DSP solution comprises unique DSP features in its 90nm S partan-3 series FPGAs such as up to 104 embedded 18x18 multipliers, SRL16 shift register logic, up to 520 Kb of distributed memory, and up to 1.

XILINX UNVEILS CORES FOR WIRELESS/CABLE MODEM INFRASTRUCTURES

For spreading rate 3, the PN sequences are truncated sequences of a maximal length linear feedback shift register sequence (6) based upon the generator polynomial of [x.

A link-level simulator of the cdma2000 reverse-link physical layer