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Failure to meet surface topography variation constraints causes defocus and pattern dimensional error in lithography, degraded transistor characteristics in the case of shallow trench isolation (STI), and electrical shorts or increased wire resistance in the case of metal interconnects, all of which are detrimental to circuit yield.
Applied's APF films are already being used in up to seven layers in 70nm Flash memory chips, including shallow trench isolation and sub-40nm gate definition, plus other key applications.
Process control requirements for shallow trench isolation (STI) layers and deep-trench capacitors benefit from ODP's ability to measure complex and high-aspect ratio shapes.
Applied's focus on cost-effective, low-downforce CMP technology has contributed significantly to customers' increased use of our CMP systems for all types of leading-edge interconnect structures, including the most advanced copper/low k designs, as well as performance-critical transistor steps like shallow trench isolation and pre-metal dielectric polishing.
com Note(*): CCD: charge-coupled device STI: shallow trench isolation DUV: deep ultraviolet
The Applied Centura DPS(R) Silicon Etch system for advanced gate, recess and shallow trench isolation and other transistor applications is firmly positioned as the system of choice for silicon etching.
The significant benefits of Applied's RadOx technology have been proven for multiple critical flash oxidation applications, including tunnel, top and bottom oxide/nitride/oxide (ONO), shallow trench isolation (STI), liner, and gate oxides.
The gauge-capable system gives users the ability to take repeatable, in-line measurements of shallow trench isolation (STI), as well as contacts and vias in high aspect ratio depth metrology without damaging the device or sacrificing a wafer for cross-sectioned measurements.