The MY1104/E is a Gigabit Ethernet Quad PHY transceiver with four Serializer/Deserializer (SerDes) channels that operate from 1.
What does SERDES stand for?
SERDES stands for Serializer/Deserializer
This definition appears very frequently
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Samples in periodicals archive:
quite common for implementations to use external 10-bit Serializer/Deserializers, where the protocol controller passes 10-bit data at 106.
Avago Technologies today announced it has shipped its 25 millionth embedded serializer/deserializer (SerDes) channel as part of the company's application-specific integrated circuit (ASIC) offering for storage, enterprise computing and network equipment manufacturers.
By integrating clock and data recovery and clock synthesis on-chip, the SPECTRA 1x2488 adds multi-rate capabilities while eliminating the need for a discrete Serializer/Deserializer (SERDES) device.
NYSE:A) today announced it has shipped its 10 millionth embedded serializer/deserializer (SerDes) channel as part of the company's application specific integrated circuit (ASIC) offering for storage, enterprise computing and network equipment manufacturers.
PMC-Sierra (Nasdaq:PMCS) has announced the PM3386 S/UNI-2xGE dual port Gigabit Ethernet transceiver, the industry's first integrated dual Serializer/Deserializer (SERDES) and Gigabit Media Access Control (MAC) controller with the industry standard POS-PHY Level 3 system interface.
The loop switch has 22 full-duplex ports, each configurable to be host, device or cascade capable, and each port includes an integrated serializer/deserializer (SerDes).
The Tachyon DX4+ from Agilent's Semiconductor Products Group, includes an internal serializer/deserializer (SerDes) supporting 4, 2 and 1 Gb/s data transfer rates and provides native support for the industry-standard 66 MHz PCI (peripheral component interconnection) and 66/100/133 MHz PCI-X (enhanced PCI) bus architectures with 32 and 64 bit support.