What does SDL stand for?

Schematic driven layout construction will be highlighted where design constraints in the schematic are automatically observed during layout creation.

The integration of schematic capture (Design Architect-IC(R)) and schematic driven layout (ICgraph SDL(R)) together with the engineering change order capability (ICeco(R)) allows concurrent design and layout development.

Productivity innovations in the schematic editor, simulation and analysis environment and schematic driven layout applications will be highlighted throughout the demo.

L-Edit, Tanner's physical layout editor, now offers: * Layer palette that displays layer names and icons * Integrated layer manager that allows users to define layers as locked or selectable * Capability to automatically convert layouts to T-cell code * DevGen feature, which creates T-cells for common devices (transistors, resistors, capacitors) with L-Edit Schematic Driven Layout (SDL) * Expanded support for small feature sizes that are more common in new designs * Ability to undo auto-placement of vias, contacts and guard rings HiPer Verify, which offers foundry-compatible, hierarchical design rule checking, now saves valuable design time by running checks from 2 to 10 times faster.

Similar to OIF, the seamless integration of OCF within the FDK allows for back annotation in order to drive UMC's Schematic Driven Layout.

Within the PDK are primitive device models supporting Virtuoso[R] Spectre[R], HSPICE and Eldo circuit simulators and p-cells for schematic driven layout.

Plus the opportunity to add Schematic Driven Layout, which integrates S-Edit with L-Edit.

These new capabilities add to L-Edit's existing schematic driven layout (SDL), which speeds the creation of correct layout from schematics.