What does RDJ stand for?

In these systems, a jitter attenuator device can be used to reduce high frequency random and deterministic jitter components from the clock synthesizer and the system board.

Distinguishing between random and deterministic jitter, for example the jitter breakdown of a serial data signal, is a crucial part of being able to identify and debug the sources of jitter.

The VSC3200 switches' configurable EQ settings and CDR give system designers maximum flexibility in addressing system-specific jitter issues, effectively eliminating both random and deterministic jitter.

6-ns (max) prop delay, low random and deterministic jitter, and tight 35-ps (typical) channel-to-channel skew.

In addition, both crosspoint switches offer highly efficient power conservation features, as well as programmable input equalization to optimize the removal of random and deterministic jitter.

Based on patented Time Interval Analyzer (TIA) technology, the company's Femto family of multi-channel timing test systems accomplishes this by dramatically improving test throughput via fast measurement rates and increased parallelism and by adding flexibility to perform critical timing tests such as random and deterministic jitter, inter- and intra-channel skew and rise/fall time on both single-ended and differential signals, on any channel, in production.