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See other meanings of IDIV
We have 1 other definition for IDIV
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1) MIPS @ 220 MHz -- 16K instruction-cache, 8K data-cache -- 4KB SRAM -- Multiply accumulate (MAC) with integer and fractional capabilities -- Industry leading debug module offering both background and real-time capability -- Hardware integer divide unit -- Integrated processor (DRAM controller, 1 UART, 1 synchronous UART, four fully programmable DMA channels, eight chip selects, 16-bit general purpose I/O, two 16-bit timers, I2C module, system Integration -- PLL, Software watchdog) Price and Availability This ColdFire microprocessor soft modem reference design is available now at no cost to registered users on http://www.