What does CDC stand for?

Clock Domain Crossing (ASIC/VLSI design)

This definition appears very rarely and is found in the following Acronym Finder categories:

Information technology (IT) and computers
Science, medicine, engineering, etc.

Other Resources:

<< Previous	Abbreviation Database Surfer		Next >>
Cirrus Design Corporation Citizens Democracy Corps (Washington, DC) Citizens Development Corps (Washington, DC) Citizens District Council Civil District Court Classified Document Control Cleared Defense Contractor (US DoD) Climate Diagnostics Center (NOAA) Clinical Data Coordinator (various companies) Clock Distribution Circuit		Clothing Distribution Center (USAP New Zealand) Clutha District Council (New Zealand) Coalition pour La Diversité Culturelle (French: Coalition for Cultural Diversity (Quebec)) Coalition to Diversify Computing Coastal Data Centre (AU) Coeur de Catherine (French; St. Catherine University; Minneapolis, MN) Cohousing Development Consulting Coin Detection Circuit Collection Development Council College of Development Communication (University of the Philippines Los Baños)

Samples in periodicals archive:

SpyGlass-CDC: This tool offers analysis and verification capabilities that address clock domain crossing (CDC) problems at both the block and chip levels.

United States: Atrenta Design Signoff Package

Novas' new clock tree debug and analysis allows engineers to easily find clock sources, extract and highlight clock domains, and detect and check clock domain crossings.

Novas enhances debug technology platform

The 0-In CDC tool provides a three-fold verification approach for clock domain crossings, checking for appropriate synchronization through structural analysis, protocol verification, and accurate simulation of metastability effects.

Mentor Graphics Provides Comprehensive Low Power Solution in TSMC ...

They serve as the front end to the most popular Electronic Design Automation (EDA) tools, including Real Intent's Ascent[TM] for automatic verification, and Meridian CDC[TM] and Meridian FPGA[TM] for Clock Domain Crossing (CDC) for ASIC and FPGA designs.

Real Intent, Verific Celebrate Eight-Year Collaborative Partnership

Clock Domain Crossing and Power Analysis Used to Enhance Quality and Reliability of Final Products SAN JOSE, Calif.

DS2 Adopts Atrenta SpyGlass[R] for Advanced ASIC Design

The free seminars, typically scheduled for 90 to 120 minutes during lunch, will cover a variety of topics, including clock domain crossing verification, design for test, constraints analysis, power management, modeling of physical effects at RTL and platform-based design techniques.

Atrenta Kicks Off Design Closure Stimulus Package Seminar Series

Real Intent Verification Support - Real Intent's Meridian FPGA Clock Domain Crossing (CDC) software offers easy-to-use automatic clock intent verification to catch design errors and create confidence in reliable CDC operations.

Altera Continues Its Productivity Leadership Position With Quartus II ...

Free Lunch Seminar "Catching Clock Domain Crossing (CDC) Bugs" to be held in Santa Clara SAN JOSE, Calif.

Atrenta Hosts Lunch Seminar on Clock Synchronization Strategies