What does BCLK stand for?

Bus Clock

This definition appears very rarely

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Samples in periodicals archive:

In particular, the high-end PRIMEQUEST 540A and PRIMEQUEST 580A models have achieved an increase in front side bus clock frequency from 533 MHz to 667 MHz.

Fujitsu Launches New PRIMEQUEST Server Line

Support for 66MHz PCI is ideal for system management and administration of applications where continuous redundancy and Quality of Service at higher bus clock speeds are critical.

EXAR UNVEILS FIRST QUAD-CHANNEL 66MHS PCI 3.0 COMPLIANT UART

Here DQ, DQS and BCLK represent data, strobe and bus clock respectively.

Timing analysis principles for digital PCBs, Part 3: on source ...

For example, streaming a 320x240 MPEG movie over the AP7000's on-chip Ethernet MAC at 100 Mbit/s and decoding it at 30 frames per second requires a CPU clock of only 120 MHz and system bus clock of only 60 MHz.

ATMEL DEBUTS AP7000 FAMILY OF DIGITAL SIGNAL CONTROLLERS

A Framer device is responsible for sourcing the bus clock along with basic framing information that allow all devices to synchronize and start communication with the Host.

MIPI Alliance Rolls Out SLIMbus(TM)

The 5X is compatible with 32-bit and 64-bit PCI slots, at either 33 or 66 MHz bus clock.

GTGI INTEGRATES HIFN 7956 SECURITY PROCESSOR INTO POWERCRYPT

Available in convection- or conduction-cooled versions, the 3U CompactPCI CV1 high-performance SBC supports core processor speeds of up to 1 GHz and bus clock rates of 167 MHz.

SBS Technologies' New Conduction-Cooled 3U CompactPCI Single Board ...

Increased Bus Clock support: Eliminates the occurrence of bottleneck conditions.

SecureSoft Introduces the First-Ever, Fully Integrated, ...