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9 These proceedings of the June 2007 symposium include 28 papers on recent advances in the theory and implementation of number systems and basic arithmetic operations to hardware implementation of complete arithmetic units and their language support.

The Stratix DSP blocks, which consist of hardware multipliers, adders/subtractors, accumulators, and pipeline registers, are high-performance embedded arithmetic units that are optimized for applications such as rake receivers, voice over Internet protocol (VoIP) gateways, orthogonal frequency division multiplexing (OFDM) transceivers, image processing applications, and multimedia entertainment systems.

The modular arithmetic unit embedded in this chip operates on integers of up to 1024 bits wide and reads operands from the data register file, operates on them, and writes the results back to the data register file.

Complex DSP operations -- The enhanced hardware arithmetic unit performs 16-bit x 16-bit multiplication and 32-bit addition in one cycle.

The core incorporates an 8-bit control unit, an 8-bit arithmetic unit and two 32-bit I/O ports.

The on-chip arithmetic unit, for example, offloads in excess of 100M operations per second of statistics calculations from the host network processor.

The PalmDSPCore, a dual-MAC parallel architecture, includes seven arithmetic units working in parallel.

In addition to the single-cycle MAC, many of the MIPS32 4Km features, such as the 32-bit arithmetic unit, large register file (32 general-purpose 32-bit registers) and 4-way set-associative cache controller, are optimized for embedded systems.